Sony’s SLVS-EC Interface - When Speed matters

Imaging solutions, whether Industrial, Automotive or Consumer, have all benefited from the dramatic increase in processing power, interface bandwidths and data storage in recent years.

Applications and consumers alike want better image quality, higher resolution and higher framerate. This market pressure for higher and higher bandwidth will continue. Market and application maturity require the following solutions to be provided without compromise; the expense of power consumption, operating temperature or a difficult/exotic manufacturing process.

Sony has always been innovative with their sensor design, allowing members of our community the chance to focus on the imaging silicon, pixel structure and whole array performance. Recently, we have benefited from the revolutionary Global Shutter image quality from Sony’s Pregius sensors as well as their Back-Side Illumination technology with their Starvis line. Sony’s continuous development happening in parallel, creates new supporting technologies that ensure easy accessibility to these  great advances in pixel technology.

The most prominent of these technology changes is SLVS-EC, a high-speed data interface standard, currently available on the newer Pregius and Starvis lines as well as some consumer grade sensor implementations. The new SLVS-EC standard with 8 available lanes answers the increasing demands in resolution and speed.

SLVS-EC (Scalable Low Voltage Signaling - Embedded Clock) diverges from most contemporary interfaces by embedding the clock into the data line. This serial transmission is received by hardware, an ASIC, FPGA or similar, which recovers the clock from the signal and then uses the clock with the original data stream to correctly sample it so it can convert to 0s and1s.


This same process is performed for all SLVS-EC lanes being used, then the combined data is aligned based on special data packets embedded into the data stream.


The SLVS-EC implements established technologies to provide a robust solution to todays expanding needs.

  1. Higher Bandwidth
  2. Fewer pins/tracks need to be implemented
  3. Higher resilience to noise and interference
  4. Lower power consumption per bit of data transferred
  5. Longer track lengths and lane to lane track length difference

icon-1Higher Bandwidth

The current implementation SLVS-EC v1.2 meets the sensor needs of today. This technology is scalable with increases in lane number and per lane bandwidth expected to support the future needs of our industry.



icon-2Fewer pins/tracks need to be implemented

You don’t need to go fast to benefit from SLVS-EC. Even with lower bandwidth systems, SLVS-EC allows for greater design freedom, easier package designs and more robust signal paths. New products and product re-designs alike will all benefit.

icon-3Higher resilience to noise and interference

Modern Imaging devices are more than just sensors with power supplies in boxes. Controlling and conquering issues of self generated noise from the many complex components that may be present require not only great designers but also tolerant technologies. The error correction and detection capability of SLVS-EC is such a compliant technology for state-of-the-art Embedded Vision.

icon-4Lower power consumption per bit of data transferred

With the ever-present need for low power, SLVS-EC provides not just higher bandwidth but also lower power requirements per transferred bit. Benefiting heat generation battery life as well as the knock-on advantages of imaging system size and material design.

icon-5Longer track lengths and lane to lane track length difference

Imaging devices come in all shapes and sizes, these design constraints are equally found because of a core technical requirement or in conjunction with other components of a complete system. The benefits of longer signal paths tolerances in design and manufacture of track lengths and flexibility with interconnects and cabling are available with SLVS-EC.

Sony has not just created a tall tower of technology with their SLVS-EC offering, but they have also provided documentation for design teams to understand, test and implement SLVS-EC. For teams wanting a boost, FRAMOS will be offering SLVS-EC Rx IP blocks for Xilinx FPGA for direct and easy implementation. To learn more about SLVS-EC and the fitting SLVS-EC Rx IP core blocks please contact us!


Contact us
The FRAMOS Imaging Team
Contact us
Click here to opt-out of Google Analytics