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HIGHLIGHT
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SLVS-EC v1.2 RX IP Core Xilinx Encrypted
IP Core, Encrypted RTL, FRAMOS GmbH, for sensor: various, various, Sony SLVS-EC v1.2, Receiver FPGA module performing byte-to-pixel conversion from incoming SLVS-EC data stream , FPGA, SoC, Xilinx Artix-7, Kintex-7, Kintex UltraScale,...
 
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HIGHLIGHT
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SLVS-EC RX IP Core – Evaluation Kit
IP Package Evaluation Boards, Evaluation Board, FRAMOS GmbH, SLVS-EC v1.2, Image Sensor (IMX421LQJ-C), FMC Connector, color, C-Mount, Evaluation Kit for SLVS-EC_v1.2_RX-IP-Core_Xilinx. Contents: Image Sensor Board (ISB) with Sony...
 
[1, , 0]
HIGHLIGHT
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SLVS-EC v1.2 RX IP Core Xilinx Source
IP Core, Source Code (VHDL), FRAMOS GmbH, for sensor: various, various, Sony SLVS-EC v1.2, Receiver FPGA module performing byte-to-pixel conversion from incoming SLVS-EC data stream , FPGA, SoC, Xilinx Artix-7, Kintex-7, Kintex...
 
[1, , 0]
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RDK-IMX174-PCBM
Printed Circuit Board, Framos, for sensor: IMX174, monochrome, Sample,
 
[1, , ]
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RDK-IMX174-PCBC
Printed Circuit Board, Framos, for sensor: IMX174, color, Sample,
 
[1, , ]
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RDK-IMX249-PCBM
Printed Circuit Board, Framos, for sensor: IMX249, monochrome, Sample,
 
[1, , ]
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RDK-IMX249-PCBC
Printed Circuit Board, Framos, for sensor: IMX249, color, Sample,
 
[1, , ]
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To support the building of embedded vision systems, FRAMOS has developed reference design kits (RDKs) and IP Cores for easy and fast integration of key FPGA based image pipeline functions. The Sony SLVS-EC IP core, for use with Xilinx FGPAs, provides all that is needed to recover the embedded clock and deserialize the image data from Sony SLVS-EC based sensors. This IP core enables customers who are implementing Sony’s 3rd generation global shutter sensors and need fast time to market and flexibility, with an IP core solution compatible to all Sony SLVS-EC image sensor. Developers and OEM’s benefit from a modular imaging pipeline with exchangeable hardware sources, full design and manufacturing packages that allows for quick integration and extension into new camera and vision system designs.

To support the building of embedded vision systems, FRAMOS has developed reference design kits (RDKs) and IP Cores for easy and fast integration of key FPGA based image pipeline functions. The... read more »
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To support the building of embedded vision systems, FRAMOS has developed reference design kits (RDKs) and IP Cores for easy and fast integration of key FPGA based image pipeline functions. The Sony SLVS-EC IP core, for use with Xilinx FGPAs, provides all that is needed to recover the embedded clock and deserialize the image data from Sony SLVS-EC based sensors. This IP core enables customers who are implementing Sony’s 3rd generation global shutter sensors and need fast time to market and flexibility, with an IP core solution compatible to all Sony SLVS-EC image sensor. Developers and OEM’s benefit from a modular imaging pipeline with exchangeable hardware sources, full design and manufacturing packages that allows for quick integration and extension into new camera and vision system designs.

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